The present invention relates to execution of host-initiated I/O operations in fibre channel nodes, and, in particular, to a method and system for employing an application specific integrated circuit and increased functionality within an interface controller component of the fibre channel node in order to eliminate unnecessary data transfers between the interface controller and the host computer or computer peripheral component of the fibre channel node and to offload processing from the host computer or computer peripheral component of the fibre channel node to the interface controller component and to the application specific integrated circuit.
The fibre channel (xe2x80x9cFCxe2x80x9d ) is an architecture and protocol for a data communications network for interconnecting computers and peripheral devices. The FC supports a variety of upper-level protocols, including the small computer systems interface (xe2x80x9cSCSIxe2x80x9d) protocol. A computer or peripheral device is linked to the network through an FC port and an FC link comprising copper wires or optical fibres, the computer or peripheral device, FC port, and FC link together referred to as an xe2x80x9cFC node.xe2x80x9d An FC port includes a transceiver and an interface controller, and the computer or peripheral device in which the FC port is contained is called a xe2x80x9chost.xe2x80x9d Hosts generally contain one or more processors, referred to as the xe2x80x9chost processorxe2x80x9d in the current application. The FC port exchanges data with the host via a local data bus, such as a peripheral computer interface (xe2x80x9cPCIxe2x80x9d) bus. The interface controller conducts lower-level protocol exchanges between the fibre channel and the computer or peripheral device in which the FC port resides.
An interface controller within an FC port serves essentially as a transducer between the serial receiver and transmitter components of the FC port and the host processor of the FC node in which the FC port is contained. The interface controller is concerned with, on the input side, assembling serially-encoded data received from the receiver component into ordered sets of bytes, assembling a majority of the ordered sets of bytes into basic units of data exchange, called xe2x80x9cFC frames,xe2x80x9d and passing the FC frames, along with status information, to the host processor within the context of larger collections of FC frames, called FC sequences and FC exchanges. On the output side, the interface controller accepts host memory buffer references and control information from the host processor, transforms them into FC frames, within higher-level contexts of FC sequences and FC exchanges, and provides the FC frames to the transmitter component of the FC port for serial transmission to the FC. The interface controller also exchanges lower-level control messages with remote nodes via the fibre channel that are used for configuring the fibre channel, maintaining state within fibre channel nodes, establishing temporary paths between nodes, arbitrating control of fibre channel loops, acknowledging receipt of data frames, and extending data transfer credits to remote nodes, among other things.
The interface controller communicates with the host processor through a set of host memory-based data structures and through a number of control registers accessible to both the interface controller and the host processor via a local bus, such as a PCI bus. At any given instant, the interface controller may be handling outgoing FC frames associated with different FC sequences, and may be also handling inbound FC frames from the FC associated with a number of FC sequences. The interface controller uses internal caches to cache information from the host memory-based data structures with which the interface controller communicates with the host processor.
The interface controller plays an analogous function within an FC port as that played by a computer processor in a multi-tasking operating system environment. The interface controller handles many different events concurrently with extremely dynamic patterns of state changes and information flow. The state of an interface controller is maintained in a number of different dynamic data structures and queues, generally stored within host memory, and accessible to both the interface controller and the host. The state of each currently active FC exchange and FC sequence is maintained in these data structures, as well as descriptors that reference incoming and outgoing frames, completion messages for write and read operations, and other such information.
I/O operations may be conducted within the context of a SCSI I/O operation embedded within the fibre channel protocol. An I/O operation is initiated by an initiator node in order to read data from, or write data to, a target node. At the conclusion of a write or read operation (xe2x80x9cI/O operationxe2x80x9d), the initiator node generally receives a FC response frame from the target node, whether or not the I/O operation successfully completes. This FC response frame is received by the interface controller from the fibre channel, the data contents of the FC response frame are transferred to a buffer in host memory, and a completion notice is placed into a separate completion queue in host memory by the interface controller. Thus, data is sent from the interface controller to two different host memory locations upon reception by the initiating node of a response FC frame.
In PC controllers, as in operating systems and other real-time device controllers, memory resources are scarce, and unnecessary data transfers can decrease data transfer bandwidth through buses and slow overall data throughput. FC controller designers and manufacturers have therefore recognized a need to decrease the memory resources allocated for I/O operations and decrease the number of data transfers between an FC controller and host memory during I/O operations between FC nodes.
The present invention provides a method and system for decreasing data transfer between the interface controller and host computer components of the fibre channel node and offloading processing tasks from the host computer component to the interface controller component and to an additional application specific integrated circuit component in order to increase system I/O bus bandwidth availability within the fibre channel node, decrease I/O latency, and decrease the amount of memory allocated within host computer memory for a given I/O operation. During initiation of an I/O operation, the host computer does not allocate a separate memory buffer to hold the FCP response frame returned as the final FCP sequence of the I/O operation from the target node. When an FCP response frame is returned to the interface controller component of an FC node by a target node during completion of an I/O operation, the interface controller examines data contained within the FCP response frame and compares the number of bytes transferred during the I/O operation with an expected number of bytes to be transferred during the I/O operation to determine whether or not the I/O operation has successfully completed. If the I/O operation has successfully completed, the interface controller extracts the FCP exchange ID from the FCP response frame and writes the FCP exchange ID to a special memory location implemented within the additional application specific integrated circuit (xe2x80x9cASICxe2x80x9d). The ASIC contains logic circuits that complete the I/O operation by de-allocating any memory resource allocated for the I/O operation within host computer memory. If the I/O operation has not successfully completed, then the interface controller queues the FCP response frame to a single frame sequence queue in host memory and queues a completion message to a message queue in host memory, as a byproduct of which the host computer is interrupted in order to complete the unsuccessfully completed I/O operation. In the normal case that an I/O operation successfully completes, unnecessary host memory allocation and data transfer related to transmitting the FCP response frame from the interface controller to the host memory is avoided, additional data transfer required to queue a completion message to the message queue in host memory is avoided, and the processing tasks normally undertaken by the host processor to parse data contained in the FCP response frame, de-queue the completion message, and de-allocated memory resources upon completion of the I/O operation are offloaded to the ASIC and interface controller. The net effect is. to increase I/O bus bandwidth, decrease I/O operation latency, and increase host memory availability in order to increase the number of I/O operations and other activities that can be concurrently managed within the fibre channel node.